ZHANG Yi, GUAN Nan, WANG Yi. A Memory Management Approach Based on Page Coloring for Multicore Systems[J]. Journal of Northeastern University Natural Science, 2014, 35(3): 351-355.
[1] Wilhelm R, Engblom J, Ermedahl A, et al.The worstcase executiontime problemoverview of methods and survey of tools[J].ACM Transactions on Embedded Computing Systems, 2008, 7(3):1/53. [2] Li Y, Suhendra V, Liang Y, et al.Timing analysis of concurrent programs running on shared cache multicores[C]//RealTime Systems Symposium.Washington D C: IEEE, 2009:57/67. [3] Kessler R E, Hill M D.Page placement algorithms for large realindexed caches[J].ACM Transactions on Computer Systems, 1992, 10(4):338/359. [4] Cho S, Jin L.Managing distributed, shared L2 caches through OSlevel page allocation[C]//IEEE/ACM International Symposium on Microarchitecture.Washington D C:IEEE, 2006:455/468. [5] Lin J, Lu Q, Ding X, et al.Gaining insights into multicore cache partitioning:bridging the gap between simulation and real systems[C]//High Performance Computer Architecture.Salt Lake City:IEEE, 2008:367/378. [6] Soares L, Tam D, Stumm M.Reducing the harmful effects of lastlevel cache polluters with an OSlevel, softwareonly pollute buffer[C]//International Symposium on Microarchitecture.Washington D C:IEEE Computer Society, 2008:258/269. [7] Zhang X, Dwarkadas S, Shen K.Towards practical page coloringbased multicore cache management[C]//Proceedings of the 4th ACM European Conference on Computer Systems.New York: ACM, 2009:89/102. [8] Jeong M K, Yoon D H, Sunwoo D, et al.Balancing DRAM locality and parallelism in shared memory CMP systems[C]//High Performance Computer Architecture.New Orleans:IEEE, 2012:1/12. [9] Guan N, Stigge M, Yi W, et al.Cacheaware scheduling and analysis for multicores[C]//Proceedings of the seventh ACM International Conference on Embedded Software.New York:ACM, 2009:245/254. [10] Yotov K, Pingali K, Stodghill P.Automatic measurement of memory hierarchy parameters[J].ACM SIGMETRICS Performance Evaluation Review, 2005, 33(1):181/192.