A New Stereo Image Disparity Algorithm Based on FPGA

doi:10.12068/j.issn.1005-3026.2020.06.004

Journal of Northeastern University Natural Science ›› 2020, Vol. 41 ›› Issue (6): 778-783.DOI: 10.12068/j.issn.1005-3026.2020.06.004

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A New Stereo Image Disparity Algorithm Based on FPGA

LI Zhen-ni， WANG Jiao， LI Jing-jiao， WANG Ze-kun

School of Information Science & Engineering， Northeastern University， Shenyang 110819， China.

Received:2019-10-17 Revised:2019-10-17 Online:2020-06-15 Published:2020-06-12
Contact: WANG Jiao
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Abstract

Abstract: A new stereo image disparity algorithm was proposed based on FPGA. Based on the block matching algorithm and according to the characteristics of FPGA， the formula of image correlation was optimized. Moreover， by combining exhaustive search and prediction search method， the execution speed of the algorithm was improved. The Stereo image disparity algorithm IP core was designed， and the processing speed and performance of the system could be improved by making full use of the FPGA’s unique parallel processing mechanism and powerful computing ability. The test results show that the stereo image disparity algorithm based on FPGA can reach the processing capacity of 33 frames per second and the processing speed can reach more than 200 times of PC， with good real-time performance. It can process 500 frames of image data continuously and has good stability.

Key words: stereo image, disparity algorithm, block matching, FPGA, IP core

CLC Number:

TP393.0

LI Zhen-ni， WANG Jiao， LI Jing-jiao， WANG Ze-kun. A New Stereo Image Disparity Algorithm Based on FPGA[J]. Journal of Northeastern University Natural Science, 2020, 41(6): 778-783.

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A New Stereo Image Disparity Algorithm Based on FPGA

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